1. Field of the Invention
This invention relates to a driving method and apparatus for a plasma display panel, and more particularly to a line erasing method and apparatus for a plasma display panel that is adapted to reduce a brightness difference between lines in the plasma display panel.
2. Description of the Related Art
Recently, a plasma display panel (PDP) feasible for a manufacturing of large-dimension panel has been highlighted as a plat panel display device. The PDP seals a discharge gas between two opposite glass substrates to provide a discharge space. Within this discharge space, electrodes for causing a discharge and barrier ribs for preventing optical and electrical interference between cells are provided.
Referring to FIG. 1, there is shown a conventional AC-type PDP driving apparatus that includes a PDP 100 having (mxc3x97n) cells 101 arranged in a matrix type, a scanning electrode driver 104 for driving scanning electrode lines Y1 to Ym in the PDP 100, a sustaining electrode driver 106 for driving sustaining electrode lines Z1 to Zm in the PDP 100, and first and second address electrode drivers 102A and 102B for supplying address electrode lines X1 to Xn in the PDP 100 with a data. The scanning electrode driver 104 sequentially applies a scanning pulse and a sustaining pulse to the scanning electrode lines Y1 to Ym, thereby scanning the cells 101 sequentially for each scanning line and sustaining a discharge at each of the selected cells 101. The sustaining electrode driver 106 applies a sustaining pulse to all the sustaining electrode lines Z1 to Zm. The first address electrode driver 102A supplies odd-numbered address electrode lines X1, X3, . . . , Xn-3, Xn-1 with a video data, whereas the second address driver 102B supplies even-numbered address electrode lines X2, X4, . . . , Xn-2, Xn with a video data.
The conventional PDP driving apparatus further includes a data array 108 receiving a video data from the input line, a frame memory 112 and a data output 114 connected between the data array 108 and the address electrode drivers 102A and 102B, a controller 110 for controlling the data array 108 and the frame memory 112, and a timing signal generator 116 for generating a timing signal under control of the controller 110. The data array 108 rearranges the input video data for each bit under control of the controller 110. The frame memory 112 stores a bit data inputted from the data array 108 under control of the controller 110 and supplies the data output 114 with the stored bit data. The data output 114 divides data from the frame memory 112 into one for odd-numbered cells and one for even-numbered cells to supply the divided data to the address electrode drivers 102A and 102B. Under control of the controller, the timing signal generator 116 applies a data latch signal to the address electrode drivers 102A and 102B and applies timing signals indicating an application time of a writing pulse, a scanning pulse, a sustaining pulse and an erasing pulse to the scanning electrode driver 104 and the sustaining electrode driver 106. The controller 110 receives a clock signal CLK, a blank signal BLANK and vertical/horizontal synchronizing signals Vsync and Hsync inputted from the exterior thereof. The controller 106 controls the data array 108, the frame memory 112 and the timing signal generator 116 on a basis of such external signals.
Generally, a driving method of the PDP 100 is classified into xe2x80x9caddress display separated (ADS) systemxe2x80x9d and xe2x80x9caddress while sustaining (AWS) systemxe2x80x9d. In the ADS system, the entire field is driven in a sequence of an address interval and a sustaining interval. On the other hand, in the AWS system, one field is divided into blocks including a plurality of scanning lines, and an address interval and a sustaining interval co-exist for each line block within one field.
In such a PDP driving method, one frame consists of a plurality of sub-fields to realize gray levels by a combination of the sub-fields. For instance, when it is intended to realize 256 gray levels, one frame interval is time-divided into 8 sub-fields.
In the ADS system, as shown in FIG. 2, each sub-field is again divided into a reset interval, an address interval and a sustaining interval. In the reset interval, the entire field is initialized. In the address interval, the cells 101 on which a data is to be displayed are selected by an address discharge. The selected cells 101 sustain the discharge in the sustaining interval. The sustaining interval is lengthened by each interval corresponding to 2n depending on a weighting value of each sub-field. In other words, the sustaining interval involved in each of the first to eighth sub-fields is lengthened at a ratio of 20, 21, 23, 24, 25, 26 and 27. To this end, the number of sustaining pulses generated in the sustaining interval also increases into 20, 21, 23, 24, 25, 26 and 27 depending on the sub-fields. The brightness and the chrominance of a displayed image are determined in accordance with a combination of the sub-fields.
Referring now to FIG. 3, a data pulse DP is applied to the address electrode X in the address interval, whereas a scanning pulse-SCP and a sustaining pulse SUSP are applied to the scanning electrode Y in the address interval and the sustaining interval, respectively. A sustaining pulse SUSP with an identical phase is applied to the sustaining electrode Z. At a time in the address interval, an address discharge is generated between the address electrode X and the scanning electrode Y. At this time, a desired level of direct current voltage is applied to the sustaining electrode Z. This direct current voltage stabilizes an address discharge between the address electrode X and the scanning electrode Y. By this address discharge, a wall charge is accumulated in a dielectric layer within the cell 101 at b time. Subsequently, at c time when the sustaining interval is initiated, a sustaining discharge is generated between the scanning electrode Y and the sustaining electrode Z by the sustaining pulse SUSP applied to the scanning electrode Y. At d time when the sustaining pulse SUSP remains at a high level, a wall charge is accumulated in a dielectric layer within the cell 101. This wall charge causes a memory effect that allows an electric field within the cell 101 to be maintained. In other words, a sustaining discharge is caused by an electric field formed by the wall charge and an electric field formed by the sustaining pulse SUSP. Accordingly, a discharge is not generated within the cell 101 in which a wall charge is not formed even though the sustaining pulse SUSP is applied thereto. Then, the sustaining pulse SUSP is applied to the sustaining electrode Z. The sustaining pulse SUSP is alternately applied to the scanning electrode Y and the sustaining electrode Z in this manner to cause a sustaining discharge. At a time when the sustaining interval is terminated, an erasing pulse EP is applied to the scanning electrodes Y simultaneously. The erasing pulse EP is set to have lower pulse width and magnitude in comparison to the sustaining pulse SUSP.
On the other hand, in the AWS system, a plurality of (usually, four to eight) lines SL are set into a line block as shown in FIG. 4 and FIG. 5 assuming that a scanning line, that is, one row of cell should be one line. In such line blocks, each sub-field includes a write interval for simultaneously turning on cells in the entire field, an address interval for selecting the cells, a sustaining interval for maintaining a discharge of the cells that are not selected in the address interval, and a line erasing interval for erasing the sustaining discharge. Herein, the sustaining interval and the number of sustaining pulses is determined by a relative brightness ratio of each sub-field in similarity to the ADS system. Also, the same number of sustaining pulses at the sub-field determined in accordance with the relative brightness ratio is applied to the lines SL included in the same line block.
In the driving method of the PDP 100 as described above, an equal sustaining interval is allocated to lines in the entire field or lines included in the same line blocks at each sub-field and the same number of sustaining pulses are applied thereto. However, the PDP 100 has a different emission efficiency at each cell depending on a thickness of the fluorescent material, a height of the barrier rib, a residual electric charge difference and an electrode characteristic difference. Also, since the number of cells turned on for each line is different, the PDP 100 generates a load deviation for each line. As a result, the conventional PDP driving method allocates the equal sustaining interval and the same number of sustaining pulses without considering the load deviation per line, thereby causing a problem in that a brightness difference is generated between the lines. This problem will be described in detail with reference to FIGS. 6A and 6B that represent equivalent circuits of a single line.
Referring to FIGS. 6A and 6B, each of the scanning electrode Y and the sustaining electrode Z included in a single line can be represented by a line resistor R. Since a dielectric material exists between the scanning electrode Y and the sustaining electrode Z, it can be represented by a capacitor C. As the number of cells turned on at one line goes larger, that is, as a load of the line increases, the number of discharging cells becomes larger to that extent to generate a larger voltage drop as shown in FIG. 6A. For instance, if 180V and 0V are applied to the scanning electrode Y and the sustaining electrode Z at a specific line, respectively, then a voltage difference between the scanning electrode Y and the sustaining electrode Z becomes 158V much lower than 180V due to a voltage drop caused by the discharging cells. Otherwise, as the number of cells turned on at one line goes smaller, that is, as a load of the line decreases, the number of discharging cells becomes smaller to that extent to generate a smaller voltage drop as shown in FIG. 6B. For instance, if a voltage difference between the scanning electrode Y and the sustaining electrode Z at a specific line caused by the sustaining pulse is 180V, then a voltage difference between the scanning electrode Y and the sustaining electrode Z becomes about 178V due to a voltage drop of about 2V occurring at a few cells. As a result, in the equal sustaining interval, a brightness at a line having a small load becomes higher that that at a line having a large load.
Accordingly, it is an object of the present invention to provide a line erasing method for a PDP that is capable of reducing a brightness difference between lines in the PDP.
In order to achieve these and other objects of the invention, a line erasing method for the plasma display panel according to one aspect of the present invention includes the steps of detecting a load amount per line for lines including a pair of electrodes for causing a sustaining discharge; and controlling the sustaining interval in accordance with a deviation in the load amount per line.
A line erasing method for the plasma display panel according to another aspect of the present invention includes the steps of detecting a load amount per line for lines including a pair of electrodes for causing a sustaining discharge; and controlling an erasure discharge for erasing the sustaining discharge for each line in accordance with a deviation in the load amount per line.
A line erasing method for the plasma display panel according to still another aspect of the present invention includes the steps of detecting a load amount for each of a desired number of lines for lines including a pair of electrodes for causing a sustaining discharge; and controlling an erasure discharge for erasing the sustaining discharge for each of the desired number of lines in accordance with a deviation in the load amount detected for each of the desired number of lines.
A line erasing apparatus for the plasma display panel according to still another aspect of the present invention includes load detecting means for detecting a load amount per line for lines including a pair of electrodes for causing a sustaining discharge; and sustaining control means for controlling the sustaining interval in accordance with a deviation in the load amount per line.
A line erasing apparatus for the plasma display panel according to still another aspect of the present invention includes load detecting means for detecting a load amount per line for lines including a pair of electrodes for causing a sustaining discharge; and erasure control means for controlling an erasure discharge for erasing the sustaining discharge for each line in accordance with a deviation in the load amount per line.
A line erasing apparatus for the plasma display panel according to still another aspect of the present invention includes load detecting means for detecting a load amount for each of a desired number of lines for lines including a pair of electrodes for causing a sustaining discharge; and erasure control means for controlling an erasure discharge for erasing the sustaining discharge for each of the desired number of lines in accordance with a deviation in the load amount detected for each of the desired number of lines.